In early October, at the 2016 IEEE Dallas Circuits and Systems Conference [http://ewh.ieee.org/soc/cas/dallas/dcas2016/] held in Arlington, TX, Alphacore presented its novel feedback time difference amplifier (FTDA) design. The circuit increases the resolution of a coarse/fine time/to/digital converter by means of a high gain time difference amplifier. The FTDA uses a 130nm CMOS technology, and it achieves good linearity and high gain for coarse/fine time/to/digital converters. It also includes a controllable time difference gain feature. The symmetrical FTDA design has two identical output generators ideally matched for an all/Digital Phase Lock Loop (ADPLL) architecture. The power consumption is 91.5uW for the highest gain at 2MHz input signals. The gain can be controlled from 25 to 735 with a ±20ps input time interval.
For more detailed amplifier specifications, please contact use our contact form here.
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In early October, at the 2016 IEEE Dallas Circuits and Systems Conference [http://ewh.ieee.org/soc/cas/dallas/dcas2016/] held in Arlington, TX, Alphacore presented its novel feedback time difference amplifier (FTDA) design. The circuit increases the resolution of a coarse/fine time/to/digital converter by means of a high gain time difference amplifier. The FTDA uses a 130nm CMOS technology, and it achieves good linearity and high gain for coarse/fine time/to/digital converters. It also includes a controllable time difference gain feature. The symmetrical FTDA design has two identical output generators ideally matched for an all/Digital Phase Lock Loop (ADPLL) architecture. The power consumption is 91.5uW for the highest gain at 2MHz input signals. The gain can be controlled from 25 to 735 with a ±20ps input time interval.
For more detailed amplifier specifications, please contact use our contact form here.
Please follow us on Facebook and Twitter.
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